FIFO memories are well known. One type of FIFO memory consists of a random access memory (RAM) associated with control circuitry. The control circuitry is used to control the writing of data into the RAM and the reading of data from the RAM.
Such FIFO systems are exemplified by the following U.S. patents to which attention is directed: U.S. Pat. No. 4,616,338 by A. Helen et al dated Oct. 7, 1986; U.S. Pat. No. 4,592,019 by A. Huang et al dated May 27, 1986; U.S. Pat. No. 4,433,394 by S. Torii et al dated Feb. 21, 1984; U.S. Pat. No. 4,163,291 by S. Suzuki et al dated July 31, 1979; and U.S. Pat. No. 3,601,809 by H. J. Gray et al dated Aug. 24, 1971.
Some drawbacks with those existing FIFO memories are that they don't operate in a message mode and they don't have the capability to re-read data from, or to re-write data to, a memory. Additionally, they employ up/down counters which ar relatively large and complex.